Samsung’s HBM4E reset Korea’s grip on the AI memory bottleneck
15 Jun 20265 min read
Summary
- Samsung shipped its first 12-layer HBM4E memory samples on 29 May 2026, beating SK Hynix to market by at least six months, per CNBC.
- SK Hynix's entire 2026 HBM production capacity is already sold out, with Nvidia chief executive Jensen Huang publicly asking the firm to "make more" at Computex Taipei.
- Hyperscaler AI compute builds for 2026 and 2027 sit downstream of memory allocation decisions made inside Samsung and SK Hynix.
Samsung shipped its first 12-layer HBM4E memory samples to Nvidia, AMD and Google on 29 May 2026, becoming the first supplier to ship the next-generation high-bandwidth memory standard. The naming matters less than the sequencing. Samsung’s HBM4E shipment lands roughly six months ahead of SK Hynix’s expected sample timeline, and it locks in Korea’s position at the centre of the global AI hardware bottleneck for at least the next eighteen months.
High-bandwidth memory (HBM) is the specialised memory architecture that sits next to the processor in modern artificial intelligence accelerators. Every Nvidia H100, H200 and B200 chip used in data centre AI training depends on HBM stacks soldered directly onto the same package as the processor itself. The reason: AI workloads are memory-bandwidth bound rather than compute-bound. The bottleneck on training a large language model is the speed of data movement between memory and processor, with computational speed rarely acting as the binding constraint at this scale. HBM4E is the next-generation specification, delivering 3.6 terabytes per second of bandwidth per stack, which is more than 20% faster than HBM4 and roughly 30% more capacity at 48 gigabytes per stack.
The competitive sequence has flipped in 2026. SK Hynix has held the HBM technology leadership position since 2023 by being the first to mass-produce HBM3, supplying Nvidia exclusively for the H100 launch, and then matching that lead with HBM3E. Samsung spent the same period trying to catch up, with mixed success on HBM3E qualification at Nvidia. The HBM4 generation closed the gap. Samsung’s HBM4E sample shipment now puts the firm ahead of SK Hynix on the next-generation specification by approximately six months, according to CNBC reporting. SK Hynix’s HBM4E samples are not expected until the second half of 2026, with mass production targeting 2027.
The capacity story compounds the competitive sequence. SK Hynix’s entire 2026 HBM production capacity is already sold out, with no remaining unallocated wafer starts available for late-arriving customers. The constraint is severe enough that Nvidia chief executive Jensen Huang walked up to the SK Hynix booth at Computex Taipei and wrote “Please Make More” on an HBM4E wafer on display. The world’s largest AI chip designer publicly asking its top memory supplier to move faster is an unusual market disclosure. The bottleneck is constraining what Nvidia can ship to its hyperscaler customers in the second half of 2026.
The supply-chain concentration risk has direct consequences for Asia’s AI build-out. Roughly 70% of global HBM production now sits with two Korean firms operating fabrication facilities in Korea and partly in the United States. Micron Technology, the only meaningful Western HBM supplier, runs a smaller share and has not closed the gap on advanced HBM generations. The Chinese memory producers, including Yangtze Memory Technologies (YMTC) and ChangXin Memory Technologies (CXMT), are still working on HBM2 and have not yet shipped HBM3 at commercial scale. The geographic concentration of HBM4 and HBM4E production in Korea means any disruption to Korean fab operations carries direct consequences for global AI compute timelines.
The disruptions worth modelling are labour, fab events and geopolitics. The parallel risk in Taiwan’s logic-chip ecosystem from the 2026 helium shortage shows how a single upstream input constraint can cascade through Asia’s AI hardware build cycle. Samsung’s Pyeongtaek and Hwaseong campuses and SK Hynix’s Icheon and Cheongju campuses are the four facilities that matter. Korean semiconductor labour unions have negotiated several rounds of wage settlements in recent years, including a notable Samsung strike in mid-2025, and the next round of collective bargaining is scheduled across both firms in late 2026 and early 2027. Fab disruptions of any meaningful duration translate to delayed HBM allocations and downstream delays for hyperscaler GPU receipts. The geopolitical layer adds export controls on advanced HBM bound for Chinese AI companies, which both Korea and the United States have been tightening through 2025 and 2026.
The hyperscaler scheduling implication runs through most AI data centre capacity announcements made for 2026 and 2027 delivery. Microsoft, Google, Meta, Amazon Web Services, Oracle, ByteDance and the Chinese hyperscalers including Tencent and Alibaba have announced multi-billion-dollar AI infrastructure expansions. Most of those announcements assume a forward HBM allocation that depends on Samsung and SK Hynix delivering on contracted wafer commitments. The “Please Make More” message from Jensen Huang is a public confirmation that the HBM bottleneck is the binding constraint on the pace of AI compute deployment. TSMC has the logic-chip fab capacity to keep pace with Nvidia design cycles; the constraint sits with the memory allocation upstream.
For Asia’s broader supply chain, the consequence is that Korea has reclaimed its position as the gatekeeper of the AI hardware build cycle. Taiwan supplies the logic chip through TSMC. Korea supplies the memory through Samsung and SK Hynix. The Netherlands supplies the photolithography machines through ASML, the sole supplier of EUV lithography equipment used in advanced node manufacturing. Japan supplies the photoresist chemistry and precision machinery through Tokyo Electron, Tokyo Ohka Kogyo and JSR. China supplies the packaging substrates and a growing share of the testing capacity. Any AI infrastructure investment thesis through the end of 2027 must cost the Samsung and SK Hynix allocation decision as a binding upstream variable.
When SK Hynix sample-ships HBM4E in late 2026 and Samsung begins HBM4E mass production, the operational question for hyperscaler procurement teams is which Korean firm holds the better delivery position into 2027, and what each firm’s allocation discipline tells them about the supply chain risks ahead.
High-bandwidth memory (HBM) is the specialised memory architecture that sits next to the processor in modern artificial intelligence accelerators. Every Nvidia H100, H200 and B200 chip used in data centre AI training depends on HBM stacks soldered directly onto the same package as the processor itself. The reason: AI workloads are memory-bandwidth bound rather than compute-bound. The bottleneck on training a large language model is the speed of data movement between memory and processor, with computational speed rarely acting as the binding constraint at this scale. HBM4E is the next-generation specification, delivering 3.6 terabytes per second of bandwidth per stack, which is more than 20% faster than HBM4 and roughly 30% more capacity at 48 gigabytes per stack.
The competitive sequence has flipped in 2026. SK Hynix has held the HBM technology leadership position since 2023 by being the first to mass-produce HBM3, supplying Nvidia exclusively for the H100 launch, and then matching that lead with HBM3E. Samsung spent the same period trying to catch up, with mixed success on HBM3E qualification at Nvidia. The HBM4 generation closed the gap. Samsung’s HBM4E sample shipment now puts the firm ahead of SK Hynix on the next-generation specification by approximately six months, according to CNBC reporting. SK Hynix’s HBM4E samples are not expected until the second half of 2026, with mass production targeting 2027.
The capacity story compounds the competitive sequence. SK Hynix’s entire 2026 HBM production capacity is already sold out, with no remaining unallocated wafer starts available for late-arriving customers. The constraint is severe enough that Nvidia chief executive Jensen Huang walked up to the SK Hynix booth at Computex Taipei and wrote “Please Make More” on an HBM4E wafer on display. The world’s largest AI chip designer publicly asking its top memory supplier to move faster is an unusual market disclosure. The bottleneck is constraining what Nvidia can ship to its hyperscaler customers in the second half of 2026.
The supply-chain concentration risk has direct consequences for Asia’s AI build-out. Roughly 70% of global HBM production now sits with two Korean firms operating fabrication facilities in Korea and partly in the United States. Micron Technology, the only meaningful Western HBM supplier, runs a smaller share and has not closed the gap on advanced HBM generations. The Chinese memory producers, including Yangtze Memory Technologies (YMTC) and ChangXin Memory Technologies (CXMT), are still working on HBM2 and have not yet shipped HBM3 at commercial scale. The geographic concentration of HBM4 and HBM4E production in Korea means any disruption to Korean fab operations carries direct consequences for global AI compute timelines.
The disruptions worth modelling are labour, fab events and geopolitics. The parallel risk in Taiwan’s logic-chip ecosystem from the 2026 helium shortage shows how a single upstream input constraint can cascade through Asia’s AI hardware build cycle. Samsung’s Pyeongtaek and Hwaseong campuses and SK Hynix’s Icheon and Cheongju campuses are the four facilities that matter. Korean semiconductor labour unions have negotiated several rounds of wage settlements in recent years, including a notable Samsung strike in mid-2025, and the next round of collective bargaining is scheduled across both firms in late 2026 and early 2027. Fab disruptions of any meaningful duration translate to delayed HBM allocations and downstream delays for hyperscaler GPU receipts. The geopolitical layer adds export controls on advanced HBM bound for Chinese AI companies, which both Korea and the United States have been tightening through 2025 and 2026.
The hyperscaler scheduling implication runs through most AI data centre capacity announcements made for 2026 and 2027 delivery. Microsoft, Google, Meta, Amazon Web Services, Oracle, ByteDance and the Chinese hyperscalers including Tencent and Alibaba have announced multi-billion-dollar AI infrastructure expansions. Most of those announcements assume a forward HBM allocation that depends on Samsung and SK Hynix delivering on contracted wafer commitments. The “Please Make More” message from Jensen Huang is a public confirmation that the HBM bottleneck is the binding constraint on the pace of AI compute deployment. TSMC has the logic-chip fab capacity to keep pace with Nvidia design cycles; the constraint sits with the memory allocation upstream.
For Asia’s broader supply chain, the consequence is that Korea has reclaimed its position as the gatekeeper of the AI hardware build cycle. Taiwan supplies the logic chip through TSMC. Korea supplies the memory through Samsung and SK Hynix. The Netherlands supplies the photolithography machines through ASML, the sole supplier of EUV lithography equipment used in advanced node manufacturing. Japan supplies the photoresist chemistry and precision machinery through Tokyo Electron, Tokyo Ohka Kogyo and JSR. China supplies the packaging substrates and a growing share of the testing capacity. Any AI infrastructure investment thesis through the end of 2027 must cost the Samsung and SK Hynix allocation decision as a binding upstream variable.
When SK Hynix sample-ships HBM4E in late 2026 and Samsung begins HBM4E mass production, the operational question for hyperscaler procurement teams is which Korean firm holds the better delivery position into 2027, and what each firm’s allocation discipline tells them about the supply chain risks ahead.