Can India chip in? Power, people and rare earth will test the timeline
13 Aug 20265 min read
Summary
- India's government has committed USD 10 billion to semiconductor manufacturing and launched India Semiconductor Mission 2.0 in the 2026-27 Union Budget.
- Three constraints will set the pace: grid stability, a projected shortfall of 250,000 to 350,000 chip engineers by 2027 according to the Mitsui MGSSI outlook, and 85% of critical rare-earth inputs still imported from China.
- Ramya Mohan, chief financial officer and head of corporate development at Cyient Semiconductors, argues the plants only count once original equipment manufacturers and Tier-1 suppliers qualify Indian-origin chips and design them into future products.
On 28 February 2026, Micron Technology inaugurated its USD 2.75 billion assembly, testing, marking and packaging facility at Sanand in Gujarat, shipping memory products to major technology clients from day one. In April 2026, the Indian government confirmed that four semiconductor plants would be operational within the year. India Semiconductor Mission 2.0, announced in the 2026-27 Union Budget and backed by Rs 1,000 crore (approximately USD 120 million) this financial year alongside a broader Rs 8,000 crore (approximately USD 960 million) ecosystem programme, signals a political commitment that is sustained rather than episodic.
The Tata Group’s Dholera fabrication facility, targeted at 50,000 wafers per month and roughly three billion chips annually, represents the more consequential test. Construction is under way, with cleanroom installation and equipment integration progressing, and trial production targeted for late 2026. In May 2026, Tata Electronics signed a strategic partnership with ASML for equipment supply — the first for an Indian commercial fab. At its planned scale and node capability, Dholera would establish India as a fabrication country rather than a packaging country. That is a qualitatively different strategic position.
In an exclusive interview with Value Chain Asia, Ramya Mohan, chief financial officer and head of corporate development at Cyient Semiconductors, argued that the plants are only one part of the story. “Real integration happens when OEMs, ODMs and Tier-1 suppliers start qualifying Indian-origin semiconductors and designing them into future products,” she said. What the industry needs now is customer commitment through qualification programmes, design wins and long-term sourcing partnerships, supported by the India Semiconductor Mission, the Design Linked Incentive Scheme and the wider push from the Ministry of Electronics and Information Technology.
On timing, Mohan is confident about direction and specific about pace. The first wave is already under way through government-backed programmes and defence and strategic electronics initiatives that prioritise indigenous content, and she expects that to ramp over the next one to two years. Broad adoption across consumer and industrial products is a three-to-five-year story. She names three bottlenecks: ecosystem readiness, meaning more design companies with strong IP portfolios alongside packaging and validation; qualification, because large OEMs do not redesign platforms quickly and cycles run multiple years; and demonstrating the consistency, quality and supply assurance that high-volume consumer brands expect.
The structural constraints are well documented, and power is the most operationally immediate. Front-end fabrication requires continuous, uninterrupted power at extreme precision. India’s grid averages 2.39 outages per customer at 3.72 hours each, against Malaysia’s 0.49 and 0.48 hours, according to the Mitsui Global Strategic Studies Institute. Gujarat’s Dholera Special Investment Region offers concessional power at Rs 2 per unit, and companies combine renewables with dedicated transmission lines and diesel generators to build around grid instability — which adds to the cost of every wafer.
Workforce is the second constraint, and the one with the longest resolution timeline. Dholera’s fabrication operation will directly require roughly 20,000 specialised workers in process engineering, fab operation and cleanroom management — hands-on roles distinct from India’s large pool of chip-design engineers in Bengaluru and Hyderabad. India Semiconductor Mission 2.0 includes workforce provisions and Tata has announced university training partnerships, but building a fabrication-grade workforce is a multi-year exercise. Mitsui projects a shortfall of 250,000 to 350,000 chip engineers by 2027.
The third constraint is materials. Eighty-five per cent of rare-earth inputs critical to semiconductor manufacturing remain imported from China, and India has no domestic rare-earth processing at commercial scale. Mohan reads that dependency differently: in her view it does not change the rationale for building in India but underlines that diversification happens in stages. Many critical materials carry some China dependence whether a chip is made in India, Europe or the US; the objective is to reduce concentration risk across more geographies, not to eliminate every dependency at once.
These constraints define the pace of India’s trajectory rather than its direction. The Mitsui report characterises 2025 to 2027 as a critical test window. Micron‘s Sanand facility has crossed the production threshold; Dholera’s late-2026 trial date is credible, though the gap between trial production and consistent 50,000-wafer monthly output is typically 12 to 18 months of ramp-up, not weeks.
For consumer-tech brands evaluating India as a semiconductor origin, the implication is that Dholera chips will not flow into product bills of materials at meaningful volume until 2028 at the earliest. Micron’s Sanand output is already commercially available to brands at the Dell, Asus and Qualcomm tier; for the broader mid-market that needs fabricated logic chips rather than packaged memory, the wait is longer.
India’s programme has moved past ambition and investment as the relevant questions — both are now visible in production milestones. Brands evaluating Indian semiconductor origin from 2028 onward have a credible programme to cite; those needing meaningful fabricated volumes before then are planning around a ramp still climbing toward commercial scale. Mohan’s own reading is constructive: the constraints set the pace, not the direction, and the first wave is already under way. What remains in question is the speed.
The Tata Group’s Dholera fabrication facility, targeted at 50,000 wafers per month and roughly three billion chips annually, represents the more consequential test. Construction is under way, with cleanroom installation and equipment integration progressing, and trial production targeted for late 2026. In May 2026, Tata Electronics signed a strategic partnership with ASML for equipment supply — the first for an Indian commercial fab. At its planned scale and node capability, Dholera would establish India as a fabrication country rather than a packaging country. That is a qualitatively different strategic position.
In an exclusive interview with Value Chain Asia, Ramya Mohan, chief financial officer and head of corporate development at Cyient Semiconductors, argued that the plants are only one part of the story. “Real integration happens when OEMs, ODMs and Tier-1 suppliers start qualifying Indian-origin semiconductors and designing them into future products,” she said. What the industry needs now is customer commitment through qualification programmes, design wins and long-term sourcing partnerships, supported by the India Semiconductor Mission, the Design Linked Incentive Scheme and the wider push from the Ministry of Electronics and Information Technology.
On timing, Mohan is confident about direction and specific about pace. The first wave is already under way through government-backed programmes and defence and strategic electronics initiatives that prioritise indigenous content, and she expects that to ramp over the next one to two years. Broad adoption across consumer and industrial products is a three-to-five-year story. She names three bottlenecks: ecosystem readiness, meaning more design companies with strong IP portfolios alongside packaging and validation; qualification, because large OEMs do not redesign platforms quickly and cycles run multiple years; and demonstrating the consistency, quality and supply assurance that high-volume consumer brands expect.
The structural constraints are well documented, and power is the most operationally immediate. Front-end fabrication requires continuous, uninterrupted power at extreme precision. India’s grid averages 2.39 outages per customer at 3.72 hours each, against Malaysia’s 0.49 and 0.48 hours, according to the Mitsui Global Strategic Studies Institute. Gujarat’s Dholera Special Investment Region offers concessional power at Rs 2 per unit, and companies combine renewables with dedicated transmission lines and diesel generators to build around grid instability — which adds to the cost of every wafer.
Workforce is the second constraint, and the one with the longest resolution timeline. Dholera’s fabrication operation will directly require roughly 20,000 specialised workers in process engineering, fab operation and cleanroom management — hands-on roles distinct from India’s large pool of chip-design engineers in Bengaluru and Hyderabad. India Semiconductor Mission 2.0 includes workforce provisions and Tata has announced university training partnerships, but building a fabrication-grade workforce is a multi-year exercise. Mitsui projects a shortfall of 250,000 to 350,000 chip engineers by 2027.
The third constraint is materials. Eighty-five per cent of rare-earth inputs critical to semiconductor manufacturing remain imported from China, and India has no domestic rare-earth processing at commercial scale. Mohan reads that dependency differently: in her view it does not change the rationale for building in India but underlines that diversification happens in stages. Many critical materials carry some China dependence whether a chip is made in India, Europe or the US; the objective is to reduce concentration risk across more geographies, not to eliminate every dependency at once.
These constraints define the pace of India’s trajectory rather than its direction. The Mitsui report characterises 2025 to 2027 as a critical test window. Micron‘s Sanand facility has crossed the production threshold; Dholera’s late-2026 trial date is credible, though the gap between trial production and consistent 50,000-wafer monthly output is typically 12 to 18 months of ramp-up, not weeks.
For consumer-tech brands evaluating India as a semiconductor origin, the implication is that Dholera chips will not flow into product bills of materials at meaningful volume until 2028 at the earliest. Micron’s Sanand output is already commercially available to brands at the Dell, Asus and Qualcomm tier; for the broader mid-market that needs fabricated logic chips rather than packaged memory, the wait is longer.
India’s programme has moved past ambition and investment as the relevant questions — both are now visible in production milestones. Brands evaluating Indian semiconductor origin from 2028 onward have a credible programme to cite; those needing meaningful fabricated volumes before then are planning around a ramp still climbing toward commercial scale. Mohan’s own reading is constructive: the constraints set the pace, not the direction, and the first wave is already under way. What remains in question is the speed.